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 PD - 94789
IRFZ34EPBF
l l l l l l l
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Ease of Paralleling Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = 60V RDS(on) = 0.042
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
G S
ID = 28A
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100C Continuous Drain Current, VGS @ 10V IDM Pulsed Drain Current PD @TC = 25C Power Dissipation
Max.
28 20 112 68 0.46 20 97 17 6.8 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Units
A
W W/C V mJ A mJ V/ns C
Linear Derating Factor VGS EAS IAR EAR dv/dt TJ TSTG Gate-to-Source Voltage Single Pulse Avalanche Energyd Avalanche CurrentA
Peak Diode Recovery dv/dt e
Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
2.2 --- 62
Units
C/W
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IRFZ34EPBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units
60 --- --- 2.0 7.6 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.056 --- --- --- --- --- --- --- --- --- --- 5.1 30 22 30 4.5 7.5 680 220 80 --- --- 0.042 4.0 --- 25 250 100 -100 30 6.7 12 --- --- --- --- --- nH --- --- --- --- pF ns nC nA V V S A
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 17A VDS = 25V, ID = 17A VDS = 60V, VGS = 0V VDS = 48V, VGS = 0V, TJ = 150C VGS = 20V VGS = -20V ID = 17A VDS = 48V VGS = 10V, See Fig. 6 and 13 VDD = 30V ID = 17A RG = 13 RD = 1.8, See Fig. 10 Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5
V/C Reference to 25C, ID = 1mA VDS = VGS, ID = 250A
f
f
fA
D G S
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 63 130 28 A 100 1.3 95 200 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25C, IS = 17A, VGS = 0V TJ = 25C, IF = 17A di/dt = 100A/s
f
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
Notes:
max. junction temperature. (See fig. 11). Starting TJ = 25C, L = 670H, RG = 25, IAS = 17A. (See Figure 12).
ISD 17A, di/dt 200A/s, VDD V(BR)DSS, TJ 175C. Pulse width 300s; duty cycle 2%.
2
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IRFZ34EPBF
4
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IRFZ34EPBF
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IRFZ34EPBF
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IRFZ34EPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFZ34EPBF
TO-220AB Package Outline
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405)
Dimensions are shown in millimeters (inches)
3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 1- GATE- DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN
LEAD ASSIGNMENTS
HEXFET
14.09 (.555) 13.47 (.530)
4- DRAIN
4.06 (.160) 3.55 (.140)
4- COLLECTOR
3X 1.40 (.055) 3X 1.15 (.045) 2.54 (.100) 2X NOTES:
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.92 (.115) 2.64 (.104)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
Note: "P" in assembly line position indicates "Lead-Free"
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.10/03
8
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/


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